1. Field of the Invention
The present invention relates to a fabricating method of a flat panel display device. More particularly, the present invention relates to a fabricating method of a flat panel display device that can reduce manufacturing costs of the flat panel display device.
2. Description of the Related Art
Generally, a liquid crystal display (LCD) device controls light transmitting through liquid crystal according to a video signal to display a picture. The liquid crystal display device may include a liquid crystal display panel, where liquid crystal cells are arranged in a matrix, and a drive circuit that drives the liquid crystal display panel.
Liquid crystal display devices may be classified according to an electric field direction in which liquid crystal is driven. For a liquid crystal display device having a twisted nematic (TN) mode, a vertical direction electric field is used. For a liquid crystal display device having an in-plane switch (IPS) mode, a horizontal direction electric field is used.
The TN mode drives liquid crystal by a vertical electric field between a pixel electrode and a common electrode of an upper substrate. The pixel electrode and the common electrode are disposed to face each other. The TN mode has an advantage in that its aperture ratio is high, but has a disadvantage in that its viewing angel is narrow. On the other hand, the IPS mode drives liquid crystal by a horizontal electric field between a pixel electrode and a common electrode. The pixel electrode and the common electrode are arranged parallel to each other on a lower substrate. The IPS mode has an advantage in that its viewing angle is wide, but has a disadvantage in that its aperture ratio is low.
FIG. 1 is a cross sectional view representing a TN mode liquid crystal display panel of the related art.
Referring to FIG. 1, the liquid crystal display panel includes an upper array substrate 52, a lower array substrate 82 and a liquid crystal 16 injected into an inner space between the upper array substrate 52 and the lower array substrate 82. For the upper array substrate 52, a black matrix 54, a color filter 56, a common electrode 68 and an upper alignment film 58 are sequentially formed. For the lower array substrate 82, a TFT, a pixel electrode 66 and a lower alignment film 88 are formed.
In the upper array substrate 52, the black matrix 54 defines a cell area where the color filter 56 may be formed. The black matrix 54 also prevents light leakage and absorbs external light so as to increase contrast. The color filter 56 may be formed in the cell area that is divided by the black matrix 54. The color filter 56 is formed of R (red), G (green) and B (blue) elements, so as to realize a color picture of the liquid crystal display panel. A common voltage is supplied to the common electrode 68 for controlling the movement of the liquid crystal 16. In an IPS mode, where the horizontal direction electric field is used, the common electrode 68 is formed on the lower array substrate 82. On the other hand, in a TN mode, where the vertical direction electric field is used, the common electrode 68 is formed on the upper substrate 52.
In the lower array substrate 82, the TFT includes a gate electrode 59 and a gate line (not shown) formed. A semiconductor layer, including layers 64 and 97, overlaps the gate electrode 59. A gate insulating film 94 is formed therebetween. Source/drain electrode 90, 92 are formed together with a data line (not shown). The semiconductor layer, including layers 64 and 97, is formed therebetween. The TFT supplies a pixel signal from the data line to the pixel electrode 66 in response to a scan signal from the gate line.
The pixel electrode 66 may be formed of a transparent conductive material with a high light transmittance and is in contact with a drain electrode 92 of the TFT. A passivation film 100 is formed therebetween. Upper/lower alignment films 58, 88 that align liquid crystal are formed by performing a rubbing process after spreading an alignment material, such as polyimide.
Thin film patterns, including the gate electrode 59 of the liquid crystal display panel, are typically patterned by a photolithography process using a mask.
FIGS. 2A to 2D are cross sectional views representing a step-by-step formation of a gate electrode by using a photolithography process.
Referring to FIG. 2A, a gate metal 59a and a photo-resist 60 are deposited on the lower substrate 82 by a deposition method such as sputtering. A mask 61 having an aperture part is aligned at each area where the gate electrode 59 is to be formed in an upper part thereof. An exposure process and a development process are performed to form a photo-resist pattern 60a shown in FIG. 2B. An etching process is performed to pattern the gate electrode 59 as shown in FIG. 2C. The gate electrode 59 is completed by the stripping process as shown in FIG. 2D.
However, a photolithography process using a mask includes steps of photo-resist depositing, mask aligning, exposing and developing processes, and an etching process. Thus, the process is complicated. Also, a developing solution that develops the photo-resist and the photo-resist pattern is excessively wasted. Furthermore, expensive equipment is used in the exposure process of the photolithography process.